FIG. 5 is a block diagram of apparatus 400 with full width array sensor 402 with photosensitive chip 404. The apparatus also includes computing device 406, memory element 408, and processor 410. The memory element is for storing light-induced signals from the plurality of sets of photosensors and the processor is for retrieving the signals and operating upon the signals to generate an image.
FIG. 6 is a plan view of first prior art portion 500 of a first photosensitive chip. The architecture for portion 500 includes set of at least one electrical element 502, pixel amplifier 504, shift register 506 and a single set 508 of photosensors 510 for each pixel amplifier, aligned in direction Y. The electrical element receives respective light-induced signals from the photosensor, for example, photosensors 510. In an example embodiment, set 502 is similar to transfer circuit 20 described in commonly owned U.S. Pat. No. 5,105,277, the disclosure of which is incorporated herein by reference in its entirety. In one example, portion 500 is designed to support a resolution of 600 spots per inch (SPI). This resolution is related to width 512 of the photosensors. Element 502, pixel amplifier 504, and shift register 506 have width 514.
FIG. 7 is a plan view of second prior art portion 600, different than portion 500 in FIG. 6, of a second photosensitive chip. To increase resolution for a photosensitive chip, the prior art teaches reducing the width of photosensors and increasing the length of associated circuitry, such as the amplifier and shift register. For example, the architecture of portion 500 is not suitable for supporting higher resolutions according to teachings of the prior art. Portion 600 includes set of at least one electrical element 602, pixel amplifier 604, shift register 606 and a single set 608 of photosensors 610 for each pixel amplifier. To support a resolution of 1200 SPI, the architecture of portion 600 in FIG. 7 differs from that for portion 500 in FIG. 6, for example, width 612 of the photosensors in FIG. 7 is reduced to about half of width 512 of the photosensors in FIG. 6, and width 614 of the pixel amplifiers in FIG. 7 is reduced to about half of width 514 of the pixel amplifiers in FIG. 6. However, the reduction in width 614 results in a subsequent increase of over 50% for length 616 with respect to length 516. The increase in length 616 is undesirable, as this increase causes a subsequent increase in the dimensions for a chip including portion 600. For example, such an increase in chip dimensions can render a chip that is suitable for a 600 SPI resolution unusable for a 1200 SPI resolution, with the result that another larger and more likely costly chip must be used, or time and expense must be committed to designing and fabricating a chip suitable for portion 600.